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The mark-II electro-holography system provides a larger image volume, more spatial resolution, and a display architecture with a more compact scanning assembly.





The design strategy for the Mark-II holovideo display was to exploit parallelism
wherever possible, both optically and electronically, such that the approach would
be extensible to arbitrarily large image sized displays. To acheive the goal of a
150x75x75mm image, two 18-channel Acousto-Optic Modulators (AOM) were used,
with each channel of a single AOM modulating beams of red light in parallel. Six tiled
horizontal mirrors scan across matched to the speed of the signal in the AOM, such
that it appears the diffraction pattern in the AOM is stationary. As the mirrors scan
from left to right, one AOM provides 18 lines of rastered image. When the mirrors
return from right to left, the second crossfired AOM provides the next 18 lines of
rastered image.

A vertical scanner images each 18-line pass below the previous
one, with 8 horizontal scans in all, providing 18x8=144 vertical scan lines.
The resulting image is horizontal parallax only (HPO), with video resolution in the
vertical direction, and holographic resolution in the horizontal direction. To match
the shear-mode active bandwidth of the tellurium dioxide crystal, we need to produce
a signal with a ~50Mhz bandwidth. To provide the output sampling at above the
Nyquist rate, we use a pixel clock of 110Mhz. Each horizontal line of the display is
256-thousand pixels of holographic fringe pattern translating to 36Mbytes of
information per frame, fed at a total data rate of 2Gpixels/sec into the display
from the frame buffers.

To drive this display, we needed an 18-channel frame buffer with each channel
configured to provide 8 vertical lines of 256K pixels. While no known off-the-shelf
frame buffer is capable of this, we were able to adapt the Cheops Imaging
System to the task. Cheops is a data-flow architecture digital video platform
developed at the MIT Media Laboratory. The Holovideo Cheops system provides
six synchronized frame buffers to drive our 256Kx144 display as well as a high
speed interface to host processors and a local data-flow processing card for
decoding of encoded or compressed image formats.


The design of the Mark-II Holovideo Display is detailed in the following Doctoral Dissertation:
Pierre St.-Hilaire, Scalable Optical Architectures for Electronic Holography, Ph. D. Thesis, Program in Media Arts and Sciences, Massachusetts Institute of Technology, September 1994.

A more concise, although somewhat outdated description of the display is available as:
Pierre St-Hilaire, Stephen A. Benton, Mark Lucente, John D. Sutter, and Wendy J. Plesniak, Advances in Holographic Video," in S.A. Benton, ed., SPIE Proceedings Vol. #1914: Practical Holography VII: Imaging and Materials, (SPIE, Bellingham, WA, February 1993), pp. 188-196.

An up to date description is in the following publication:
P. St.-Hillaire, M. Lucente, J.D. Sutter, R. Pappu, C.J.Sparrell, and S. Benton. "Scaling up the MIT holographic video system" Proceedings of the Fifth International Symposium on Display Holography (Lake Forest College, July 18-22, 1994), SPIE, Bellingham, WA, 1995.

There is also a more comprehensive list of references on the Mark-II display, and other projects at the Spatial Imaging Group's publications page.